1. Field of the Invention
The present invention relates to a semiconductor light emitting element and, more particularly, to a semiconductor light emitting element of a monolithic structure.
2. Description of Related Art
Japanese Unexamined Patent Publication No. SHO 58(1983)-223380 discloses a semiconductor light emitting element of a monolithic structure (hereafter, also referred to as “monolithic array”) comprising, as illustrated in FIG. 5E, an n-type GaAs buffer layer (not illustrated), an n-type AlInP clad layer 31, a non-doped active layer 32, a p-type AlInP clad layer 33, an AlGaAs current diffusion layer 34, a dielectric film (not illustrated) and a p-type electrode (not illustrated) formed in this order on an upper surface of an-type GaAs substrate 30, with an n-type electrode (not illustrated) provided on a lower surface of the n-type GaAs substrate 30.
With the above constitution, light emission should occur at the interfaces between the non-doped active layer 32 and portions of the p-type clad layer 33, but actually it occurs in the middle of the active layer 32 in its thickness direction (see: dotted line in FIGS. 5B–5E), for the reason below. In manufacturing the semiconductor light emitting element, the n-type GaAs buffer layer (not illustrated), the n-type AlInP clad layer 31, the non-doped active layer 32, the p-type AlInP clad layer 33 and the AlGaAs current diffusion layer 34 are formed in this order on the n-type GaAs substrate 30. Then, the resulting wafer is divided into segments by etching the p-type AlInP clad layer 33 and the AlGaAs current diffusion layer 34 so that light-emitting regions A are formed. At this time, unintended light-emitting regions B are also formed. Here, the light-emitting region A is a region where a portion of the p-type AlInP clad layer 33 is left after the etching and where the portion of the p-type AlInP clad layer 33 and the non-doped active layer 32 form an interface therebetween. The unintended light-emitting region B is a region where there is left no portion of the p-type AlInP clad layer 33, as illustrated in FIG. 5D.
P-type carriers diffuse from the p-type clad layer 33 into the active layer 32 when the p-type clad layer 33 is formed on the active layer 32, as illustrated in FIG. 5B, to form a p-type region in the active layer 32 on a p-type clad layer 33 side that extends to the middle of the active layer 32 in its thickness direction mentioned above. As a result, light emission occurs not at the interfaces between the non-doped active layer 32 and the portions of the p-type clad layer 33 but at the middle of the active layer (see: 35 in FIG. 5E). Therefore, electric current also flows through other portions of the active layer than the portions thereof which are included in the light-emitting regions A. Consequently, the area of the monolithic array through which electric current flows becomes significantly larger than designed.
This is the reason why further etching has conventionally been carried out to remove, as illustrated in FIG. 5E, surface areas of the unintended light-emitting regions B, and thereby to cause light emission only in the light-emitting regions A (see: 35 in FIG. 5E).
Such etching, however, finds difficulties in controlling the amount of etching.